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This is somewhat of a long story but I think it's needed for background. I'll try to keep it short.

I obtained a number of these 44 pin SSD modules.

enter image description here

They are not 2.5" format, but have the same pinout. They work on a standard 40 pin IDE port when using a passive adapter except they like to talk on the bus when /IOR is asserted, even if neither IDE chip select is asserted. This causes weird problems such as detecting serial ports that don't exist and the floppy change line no longer works. (Some of you may remember me posting about this in the past) This may not matter on IDE ports that have bus transceivers on all 16 data lines, but some newer/cheaper I/O cards connect the data lines directly to the ISA bus. Incidentally, I've seen the exact same problem on CF cards. So I designed a PCB that the SSD and a power cable will plug into, that plugs directly into an IDE port.

enter image description here

It contains HCT245 and HCT244 bus drivers and a PLD to simplify the logic. It has power and ground planes with decoupling caps on everything so I think signal quality is no issue. I've used these on multiple older systems with absolutely no problems: a 286 with one of those cost reduced I/O cards, a Compaq 386 with integrated IDE, and a 486 with MR BIOS and an I/O card with the full transceivers on the IDE port.

So when I obtained a new basic 386 board and stuck an exact copy of those cost reduced I/O cards into it and replaced the AMI BIOS with MR BIOS, I assumed my SSD board would work without complaining. Nope. No matter what I did, it wouldn't boot from the SSD. "Starting MS-DOS..." is as far as it would get. I swapped the adapter boards around with other computers and the fault follows this motherboard. Interestingly if I booted DOS from floppy, I could access the SSD without issue. If I plug a standard 3.5" IDE hard drive into the adapter board (with passive adapter of course) or directly into the IDE port, it would boot from that and work perfectly. I went back to the factory AMI BIOS and it made no difference. I tried the SSD and a CF card directly on the IDE port and they both worked, except for the weird problems I described earlier. And no, this isn't something that fdisk /mbr fixes. I did that.

Somewhat by accident I figured out if I put 1K pull-ups on the IDE data lines of the SSD side of my board, it fixed it. I ordered some SMD resistor networks that became a somewhat elegant bodge, attached to the HCT745's, and that took care of it. Note the photo doesn't show a board with the bodge but they are attached directly to each '245.

I cannot find any information on this. The best I've been able to do is discover the I/O card designed by this guy that has the exact same type of pull-up. His are user-selectable with a jumper, but unfortunately he does not go into any detail about it at all.

So does anyone know what is going on with this? I'm happy this makes it work, but puzzled as to why three other computers are happy without them, but a fourth needs the pull-ups even though it uses the same model I/O card.

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2 Answers 2

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The ATA/ATAPI-5 standard does not mandate a pull-up.

On the contrary, it says that DD7 must have a pull-down for the host to detect non-present devices correctly.

Obviously floating IOs are bad and my interpretation of the standard is that a pull-up is allowed on the other DD pins.

In addition, the HCT type chips may not be suitable in all systems, as the standard is made for TTL logic input and output, and if CMOS is used, it should use TTL compatible inputs and outputs - which the HCT logic isn't as it has very strong high output.

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    I thought I really did my homework, looking at logic input and output voltage specs on the SSD module and PLD and trying to make everything work. What could a CMOS level output do in a system that's TTL level? I had assumed since it's well beyond the TTL input levels, all would be good.
    – eesz34
    Commented Jun 28 at 13:07
  • CMOS output to TTL devices is fine. The problem is if you have TTL outputs (eg from your HCT chips) connected to CMOS inputs (which is what you probably have on your SSDs), which sometimes causes problems. The mismatch is marginal, and it usually works, but perhaps if you have slightly low power supply output voltage or similar you could get an issue. A common solution to this is using a pull-up resister on each line to nudge the high level output voltage slightly higher. I guess that this is what's happening on your board.
    – occipita
    Commented Jun 28 at 19:38
  • @occipita Wrong, HCT chips don't have TTL outputs. They are fully CMOS but the input just works with TTL levels. And using HCT chips in TTL environment may not work due to the logic being faster and unable to work in environment intended for slower chips with slower slew rate or slower rise/fall times.
    – Justme
    Commented Jun 28 at 19:42
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What is going on is the changes in logic families over time. A ttl logic gate doesn't need pull ups, it requires it's inputs to be pulled low. Its output may or may not pull the output high. Interfacing older boards which will use TTL logic with newer CMOS devices (which require the input to be pulled both high and low) sometimes needs pull up resistors on the TTL output to work, but not necessarily. They will be unnecessary if the TTL chip has buffered output. Otherwise, it may work unreliably, or not at all. Unfortunately, when pull ups are necessary they are, and when not, they are undesirable. There is no point in having extra current in your chips when it's avoidable

EDIT

TTL chips are not voltage devices, they are current devices, they don't really care about voltage. TTL input is low when current is flowing from the TTL input to the TTL output, and high otherwise, A TTL output is pulled up by the TTL input it is connected to. The voltages are nominal. There is often enough leakage current around that TTL outputs can be connected to CMOS in without pull ups, but this is not guaranteed - hence you get sometimes works and weird errors with this combination

CMOS chips are voltage devices, the inputs are capacitve, unlike TTL inputs which are resistive. This complete difference of operation means that these families are marginally compatible. Some TTL outputs are buffered, and these have much better compatibility with the newer logic which is invariably CMOS

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    Looking at the SSD datasheet again (alldatasheet.com/datasheet-pdf/pdf/330168/TRANSCEND/…) I'm slightly suspicious of the logic levels quoted. It gives two values, one for Schmitt trigger and one for without, but gives no indication what type each input is. With a high level min input of 4.0V for non-Schmitt, maybe some SSD inputs are CMOS without internal pull-up/downs. When the SSD is connected directly to the ISA bus, the data lines can't float and that's why it mostly works.
    – eesz34
    Commented Jun 28 at 13:20
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    @eesz34 While the data sheet doesn't specify it, it makes some sense to add Schmitt triggering to edge-sensitive inputs to avoid false edge detections at slow rise and fall times. In the case of this product, Schmitt triggering is most useful on /IORD and /IOWR, as there should be enough setup/hold time on all other signals for them to be stable without the requirement of Schmitt triggering. Requiring 4V high-level input is not ISA/IDE compatible. ISA/IDE is specified in terms of TTL, so the receiver needs to accept 2V as high, which is even below the typical Vcc/2 CMOS threshold.
    – Michael Karcher
    Commented Jun 28 at 19:46
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    Indeed, if CMOS input requires 4V, no TTL chip output is even required to output that high voltage, so a pull-up is required to make them electrically compatible with voltages, but the signal rise speed depends on the pull-up strength. Also generally pull-downs are not used with TTL because it makes more sense to use pull-ups or you just burn power up. And TTL buses should not be left floating, a disconnected input tends to be high but no guarantees.
    – Justme
    Commented Jun 28 at 19:49

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