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Multiple-emitter transistor

From Wikipedia, the free encyclopedia

A multiple-emitter transistor is a specialized bipolar transistor mostly used at the inputs of integrated circuit TTL NAND logic gates. Input signals are applied to the emitters. The voltage presented to the following stage is pulled low if any one or more of the base–emitter junctions is forward biased, allowing logical operations to be performed using a single transistor. Multiple-emitter transistors replace the diodes of diode–transistor logic (DTL) to make transistor–transistor logic (TTL),[1] and thereby allow reduction of switching time and power dissipation.[2][3]

cross section and symbol of a simple NPN bipolar transistor
cross section and symbol of a multiple emitter NPN bipolar transistor

Logic gate use of multiple-emitter transistors was patented in 1961 in the UK and in the US in 1962.[4]

References

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  1. ^ Bipolar-Junction (BJT) transistors – UCSD ECE65 class notes
  2. ^ Jacob Millman, Microelectronics: Digital and Analog Circuits and Systems, McGraw-Hill, 1979 ISBN 0-07-042327-X, pp. 106–107
  3. ^ Douglas J. Hamilton, William G Howard, Basic Integrated Circuit Engineering, McGraw Hill, 1975, ISBN 0-07-025763-9, pp. 457–467
  4. ^ B. A. Boulter, The Multiple Emitter Transistor In Low Power Logic Circuits in Edward Keonjian (ed) Micropower Electronics, Elsevier, 2013, ISBN 148315503X, p. 105 ff
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