When you focus on synthesizable-only Verilog like I do, it's easy to forget that you can do arbitrary computations during elaboration to compute constants for synthesis. Here's an example: a helper function to compute the Greatest Common Divisor of two integers, which is a useful building block for larger calculations. It needs the absolute value helper function, but that's trivial. https://lnkd.in/gvq7a6pG
Charles Eric LaForest, PhD’s Post
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One element conspicuously missing from the set of Boolean operations is that of Exclusive-OR, often represented as XOR. https://bit.ly/3TsV3Az
The Exclusive-OR Function: The XOR Gate | Boolean Algebra | Electronics Textbook
allaboutcircuits.com
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Software Engineer (Full Stack) | Proficient in Laravel, Flutter, and JavaScript Frameworks (Next.js, React.js, Vue.js) | PG @ RVCE
DSA Day-134🔶 Question:137. Single Number II Given an integer array nums where every element appears three times except for one, which appears exactly once. Find the single element and return it. You must implement a solution with a linear runtime complexity and use only constant extra space. Approach: The code uses two variables, ones and twos, to keep track of the bits that appear once and twice, respectively, in the binary representation of the numbers. The XOR operation updates ones and twos, and the bitwise AND operation ensures that the bits are reset when they appear three times. The final result is stored in the ones variable, representing the single number that appears exactly once in the array. Time Complexity: O(n) Space Complexity: O(1) Code:https://lnkd.in/gZSbVR27 #softwareengineering #dsa #leetcode #interviewpreparation
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Then, we can compose an array of Address Decoders into a generic Binary to One Hot Converter. https://lnkd.in/gbMMSQ8T
Binary To One-Hot Converter
fpgacpu.ca
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Formal Verification Engineer | Certified Keynote Speaker | Married to VLSI | Insatiable burning desire for Semiconductors | "You can't burn a woman made of FIRE. She is ME!!!" | @SwitiSpeaksOfficial
Associative Arrays in SV Fun Facts: - Storage allocated only when used - Index can be of any type e.g. String, Class, Event, etc. - Implements lookup table - Index imposes ordering Let's also understand a coding example which explains: - Declaration - Look up table implementation - Ordering using index - Array methods To know the details, you can go through detailed lectures on Associative Arrays. Link in COMMENTS. #sv #systemverilog #vlsidesign #vlsitraining #vlsi #semiconductor #semiconductorindustry #verification #rtldesign #vlsicourse #switispeaks #switipinjani
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I went across a very interesting solution using Xor operator for a simple leet code question. So with exclusive Or operator in discrete math it becomes true only and only if one of the bits is true but false if either both are true or both are false. So, if we try to find a number in an array that does not repeat itself and if we have repeating numbers, with the Xor the repeating numbers will cancel itself, resulting only the non repeating number. for example 5 in 4 bits representations 0101 if 5 repeats itself 0101 Xor 0101 => 0000 It seems more simple than iterating in pairs and using the pointer technique. /** * @param {number[]} nums * @return {number} */ var singleNumber = function(nums) { let result =0; for ( let num of nums){ result ^= num } return result; };
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Pro Tip: The fastest way to compute on a CPU is bit math (directly manipulating the 1's and 0's on the memory registry). Take a look at these 2 wild algorithms that provide exponential improvements in the speed of programs: Famous Inverted Square Algorithm for Quake 3 (I literally don't understand 99% of the math going on here...but hey...it works 😁 ) https://lnkd.in/edBhss8s The inverted square algorithm is used for computing light and shadow casting in games, so if you think about it, in today's games, you want to get the shadows as realistic as possible and microseconds matter. -- Integer to Ascii Conversion Algorithm - Splits an Int into 2 halves, computes the bitwise representation of both halves in parallel and sandwiches them back together: https://lnkd.in/eEmcqSfQ I actually used this Iota algorithm at the suggestions of Thomas Kejser and it brought my C program from 14 seconds down to under 3 for writing 1B integers to text files. Link to that article is here: https://lnkd.in/ecuBB-qB #dataengineering
optimized itoa function
stackoverflow.com
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#day13 #embeddedsystems DSA: Finding Prime number using optimal Sieve method >GCD/LCM or Euclid’s Algo >Modular Arithmetics/ Fast Exponentiation Embedded C: Learnt the concept of structures and bitfield. >Ex: typedef struct{ uint32_t mode0 : 2; uint32_t mode1 : 2; . . uint32_t mode15 : 2; }GPIOx_MODER_t; >Here, ":2" gives facility of storing 2 bits. Size of struct would be 4 bytes. If bitfield isn't used and each member is minimum of uint8_t then struct size would be 16 bytes. >Learnt the concept of union. >How union differs from struct: -only 1 member can be accessed at a time -only 1st member can be initialized -size of union is size of largest member etc... >usage: -storing mutually exclusive data thus saving memory. -bit extraction as shown in attached image. When packetvalue is loaded, accessing struct elements will automatically extract bits from packetvalue. >preprocessor: -capitalize macros to distinguish them from normal variables problem: #define AREA(R) 3.14*R*R main{ area=AREA(1+1); } Here, this function macro won't give true result as it is replaced as 3.14*1+1*1+1 hence precedence rule will give false area. Solution: #define AREA(R) 3.14*(R)*(R)
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How I used DOT (graph description language) to represent technical specifications as a graph. Example is given for TS 38.213 chapter 4.1 - cell search procedure. Initially, the answer appeared overly general. However, subsequent attempts incorporated more detailed technical information directly from the document.
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I really enjoy viewing circuit problems as graphs, even if it's not always optimal. While trying to improve verification tasks using graph algorithms, I encountered issues due to Jasper lack of fine-grained synthesis (well, is not like that, for formal verification an optimal synthesis is not commonly required). Additionally, I modified the in-degree of the current graph algorithm from three to two for simplicity (right pic: in-degree 3, left pic: in-degree 2). While DFS is good for finding the shortest path (graph -shortest_path [...]), and I'm familiar with the optimized graph-schematic algorithm in FSV, I require a more specific solution. Fortunately, converting the circuit to a graph is easy with the *graph* command.
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Here's an example of using a function in place of redundant explicit conditional assignments in verilog. This reduced the number of adaptive logic modules used, increased registers, and improved timing closure in a netlist-style structural core. The added registers indicates that the fitter may have had more freedom to add buffers and reduce number of fanouts, which possibly is what improved timing closure. I'm still learning so I'm open to better suggestions or explanations. :)
simplify psg volume logic by birdybro · Pull Request #15 · nukeykt/Nuked-MD-FPGA
github.com
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